\subsubsection{\NonOptimizingKeilVI (\ARMMode)}

\begin{lstlisting}[style=customasmARM]
.text:000000A4 00 30 A0 E1      MOV     R3, R0
.text:000000A8 93 21 20 E0      MLA     R0, R3, R1, R2
.text:000000AC 1E FF 2F E1      BX      LR
...
.text:000000B0             main
.text:000000B0 10 40 2D E9      STMFD   SP!, {R4,LR}
.text:000000B4 03 20 A0 E3      MOV     R2, #3
.text:000000B8 02 10 A0 E3      MOV     R1, #2
.text:000000BC 01 00 A0 E3      MOV     R0, #1
.text:000000C0 F7 FF FF EB      BL      f
.text:000000C4 00 40 A0 E1      MOV     R4, R0
.text:000000C8 04 10 A0 E1      MOV     R1, R4
.text:000000CC 5A 0F 8F E2      ADR     R0, aD_0        ; "%d\n"
.text:000000D0 E3 18 00 EB      BL      __2printf
.text:000000D4 00 00 A0 E3      MOV     R0, #0
.text:000000D8 10 80 BD E8      LDMFD   SP!, {R4,PC}
\end{lstlisting}

The \main function simply calls two other functions, with three values passed to the 
first one~---(\ttf).

As was noted before, in ARM the first 4 values are usually passed in the first 4 registers (\Reg{0}-\Reg{3}).

The \ttf function, as it seems, uses the first 3 registers (\Reg{0}-\Reg{2}) as arguments.

\myindex{ARM!\Instructions!MLA}
The \TT{MLA} (\IT{Multiply Accumulate}) 
instruction multiplies its first two operands (\Reg{3} and \Reg{1}), adds the third operand (\Reg{2}) to the product and stores
the result into the zeroth register (\Reg{0}), via which, by standard, functions return values.

\myindex{Fused multiply–add}
Multiplication and addition at once\footnote{\WPMAO} (\IT{Fused multiply–add}) 
is a very useful operation. By the way, there was no such instruction in x86 
before FMA-instructions appeared in SIMD
\footnote{\href{http://go.yurichev.com/17103}{wikipedia}}.

The very first \TT{MOV R3, R0}, 
instruction is, apparently, redundant (a single \TT{MLA} instruction could be used here instead). 
The compiler has not optimized it, since this is non-optimizing compilation.

\myindex{ARM!Mode switching}
\myindex{ARM!\Instructions!BX}

The \TT{BX} instruction returns the control to the address stored in the \ac{LR} register and, if necessary, 
switches the processor mode from Thumb to ARM or vice versa.
This can be necessary since, as we can see, function \ttf is not aware from what kind of code it may be
called, ARM or Thumb.
Thus, if it gets called from Thumb code, 
\TT{BX} is not only returns control to the calling function,
but also switches the processor mode to Thumb.
Or not switch, if the function has been called from ARM code \InSqBrackets{\ARMSevenRef A2.3.2}.
% look for "BXWritePC()" in manual
